1. general description the 74vhc541-q100; 74vhct541-q100 are high-speed si-gate cmos devices. the 74vhc541-q100; 74vhct541-q100 are octal non-inverting buffer/line drivers with 3-state bus compatible outputs. the output enable inputs oe 0 and oe 1 control the 3-state outputs. a high on oe n causes the outputs to assume a high-impedance off-state. this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? balanced propagation delays ? all inputs have a schmitt-trigger action ? inputs accept voltages higher than v cc ? the 74vhc541-q100 operates with cmos input level ? the 74vhct541-q100 operates with ttl input level ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) ? multiple package options 74vhc541-q100; 74vhct541-q100 octal buffer/line driver; 3-state rev. 1 ? 4 june 2013 product data sheet
74vhc_vhct541_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserve d. product data sheet rev. 1 ? 4 june 2013 2 of 17 nxp semiconductors 74vhc541-q100; 74vhct541-q100 octal buffer/line driver; 3-state 3. ordering information 4. functional diagram table 1. ordering information type number package temperature range name description version 74VHC541D-Q100 ? 40 ? c to +125 ? c so20 plastic small outline package; 20 leads; body width 7.5 mm sot163-1 74vhct541d-q100 74vhc541pw-q100 ? 40 ? c to +125 ? c tssop20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm sot360-1 74vhct541pw-q100 74vhc541bq-q100 ? 40 ? c to +125 ? c dhvqfn20 plastic dual-in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 ? 4.5 ? 0.85 mm sot764-1 74vhct541bq-q100 fig 1. logic symbol fig 2. iec logic symbol 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 1 19 a 0 a 1 a 2 a 3 a 4 a 5 a 6 a 7 y 0 y 1 y 2 y 3 y 4 y 5 y 6 y 7 oe 0 oe 1 mna179 mna180 9 11 12 13 14 15 16 2 3 4 5 6 7 8 18 17 19 1 & en
74vhc_vhct541_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserve d. product data sheet rev. 1 ? 4 june 2013 3 of 17 nxp semiconductors 74vhc541-q100; 74vhct541-q100 octal buffer/line driver; 3-state 5. pinning information 5.1 pinning 5.2 pin description (1) this is not a supply pin. the substrate is attached to this pad using conductive die atta ch material. there is no electrical or mechanical requi rement to solder this pad. however, if it is soldered, the solder land should remain floating or be connected to gnd. fig 3. pin configuration so20, tssop20 fig 4. pin configuration dhvqfn20 9 + & |